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IC RF Power Detector

This is part of a schematic of an RF CMOS power detector.

IC Inductor Parameter Extraction

To validate custom inductor designs, measured s-parameter data is processed to extract relevant data (inductance, parasitics, etc.) to be used in circuit simulation.

ASITIC Integrated Circuit Inductor Development

For custom inductor/balun development, ASITIC is used for initial design (using custom CIF device generators if desired). In case a design holds multiple inductors, ASITIC is used for initial coupling analysis and design.

Final design is validated in a full structure FDTD simulator.

Example IC Layout

This is part of a CMOS RF LNA design.